FN12: the 2012 final
The Fall 2012 final (200 points). Work through it in order: each part gives its question in short and links to the page that solves it, and to its exam way where the page has one. The exam ways of F1–F4 and M6 come with their rebuild in early December.
20 parts: all solved in the guide, 10 with an exam way.
FN12-1
FN12-1a (6 points)
With defined by 100 µA of saturated current in a 10 µm/0.18 µm device, find if the leakage is 100 nA (80 mV/decade, no DIBL).
FN12-1b (6 points)
With the source raised to 1.0 V, what is the drain current? Ignore DIBL and the body effect.
FN12-1c (6 points)
Which of two circuits, one with stacked devices, leaks less? Explain.
FN12-2 (6 points)
Why is the FO1 delay more than a quarter of the FO4 delay?
FN12-3 (7 points)
Why are grids preferred for power and ground? Give at least two reasons.
FN12-4 (7 points)
Name at least three sources of on-chip decoupling capacitance. Why is it needed?
FN12-5
FN12-5a (12 points)
A domino gate in evaluate, node D (50 fF) precharged to 2.5 V and node C (10 fF) at ground: A rises. The final voltage on D, and its consequence.
FN12-5b (10 points)
Describe at least two circuit changes that mitigate it.
FN12-6 (15 points)
Draw an 8-bit arithmetic right shifter from 2:1 muxes, with a 3-bit shift amount.
FN12-7
FN12-7a (15 points)
Sketch and from a local clock generator, marking the delays and .
FN12-7b (15 points)
Two latches on two generators, CLK2 1.5 ns after CLK1, 0.5 ns of logic: how must and change from zero?
FN12-8
FN12-8a (15 points)
A domino path: the evaluation delay from A to G with every width 1 µm.
FN12-8b (15 points)
Keep µm, tune – for minimum delay, and give the new delay.
FN12-9
FN12-9a (10 points)
The Elmore delay from A to B of a 0.4 µm wire.
FN12-9b (10 points)
Widen the wire to 4 µm and recompute.
FN12-9c (12 points)
Make the first 2000 µm 4 µm wide and the last 2000 µm 0.4 µm: compare with (b) and explain why tapering helps.
FN12-10
FN12-10a (9 points)
Find and of a PLA as functions of , , .
FN12-10b (9 points)
Two dynamic stages on one clock: find Z, and the clock phase in which Y and Z evaluate.
FN12-10c (9 points)
A differential gate: find Y and as functions of A and B.
FN12-10d (9 points)
Complete the logic table of a decoder-driven ROM.